The present invention relates to a circuit arrangement for rapidly generating an oscillating electrical input signal at a predetermined frequency for input to a computer circuit means and, more particularly, to a circuit arrangement for rapidly resetting the computer circuit means with the oscillating electrical input signal. A circuit arrangement for resetting microprocessors has already been suggested in DE-OS 31 19 117. In this circuit arrangement the output signal of the clock generator is used for the purpose of resetting. To do this, the output signal of the clock generator is rectified and fed to the reset input of the microprocessor. When the supply voltage is switched on, the resetting process of the microprocessor is only concluded when the clock generator of the microprocessor has already begun to oscillate. Undefined states which can occur e.g. when the microprocessor is reset in a voltage-dependent manner but the clock generator has not begun to oscillate are accordingly reliably prevented. But such a resetting process can be of quite long duration under certain circumstances, particularly when generators are used which begin to oscillate only very slowly, e.g. quartz oscillators. Further, a circuit which is already known from the Siemens microcontroller 80C 517 has, in addition to a quartz oscillator, an RC oscillator which serves to monitor the quartz oscillator.